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Computer Engineer

Sudip Paudel

Embedded Systems / Software / Hardware

Bare-metal ARM firmware, IEEE 754 RTL, and two live AI platforms.

Printed circuit board with copper traces routing to a central integrated circuit
Logic elements synthesized
706
IR carrier generated
38 kHz
Platforms deployed live
2
Graduating
May 2027
U1 · About

About Sudip Paudel — embedded firmware and full-stack engineering

Sudip Paudel, Computer Engineer

I build things that sit on both sides of the hardware/software line. On the metal side that means register-level drivers with no vendor HAL — configuring clocks, timers, NVIC and UART directly out of the datasheet — and synthesizable SystemVerilog on FPGA, where a design isn't done until static timing says it is.

On the software side it means shipping. I've designed, built and deployed two production AI platforms end to end: data model and row-level-security auth, the product surface, and the deploy pipeline. Same instinct in both worlds — understand the layer underneath instead of trusting the abstraction.

I'm finishing my B.E. in Computer Engineering at UT Arlington (May 2027) and looking for a Summer 2026 engineering internship where I can work close to the hardware, the systems, or both.

U2 · Skills

Technical skills — languages, embedded hardware and tools

Proficiency by pin. Filled pads indicate depth of hands-on use.

Languages

J1

Primary development languages

  • 01C
  • 02C++
  • 03SystemVerilog
  • 04Assembly (ARM)
  • 05Java
  • 06JavaScript / TypeScript
  • 07SQL
  • 08HTML / CSS

Embedded / Hardware

J2

Silicon, signals and the layer below the OS

  • 01ARM Cortex-M4 (TM4C123)
  • 02Register-level drivers
  • 03Timers & input capture
  • 04PWM / UART / NVIC
  • 05Intel MAX 10 FPGA
  • 06Static timing analysis
  • 07Raspberry Pi / Embedded Linux

Tools & Platforms

J3

Toolchains, frameworks and infrastructure

  • 01TI Code Composer Studio
  • 02Intel Quartus Prime
  • 03Git / Linux
  • 04Next.js / React
  • 05Node.js
  • 06Supabase (Postgres, RLS)
  • 07OpenAI API
  • 08Vercel
U3 · Education

Education — B.E. Computer Engineering, UT Arlington

  1. University of Texas at Arlington

    Expected May 2027

    B.E., Computer Engineering · Arlington, TX

    • Digital Logic
    • Embedded Systems
    • Computer Architecture
    • Operating Systems
    • Electronics & Circuit Analysis
    • C Programming
  2. Dallas College

    May 2024

    Associate of Science · Dallas, TX

U4 · Projects

Engineering projects — embedded firmware, FPGA RTL and full-stack

From register-level firmware to synthesized RTL to deployed platforms.

Captured IR mark/space waveform with a 38 kHz carrier insetEmbedded
2025U01

IR Remote Control Replacement

TM4C123GXL (ARM Cortex-M4)

A bare-metal universal IR remote that records and replays signals from any consumer remote via a UART command shell — every driver written at the register level, with no vendor HAL.

  • C
  • ARM Cortex-M4
  • TI Code Composer Studio
Read more →
FP16 bit-field layout above the add datapath, normalization shifter marked as the critical pathFPGA / RTL
2025U02

IEEE 754 Half-Precision Floating-Point Adder

Intel MAX 10 FPGA

A 16-bit IEEE 754 floating-point adder/subtractor designed and synthesized in SystemVerilog, wrapped in a complete keypad-to-display user-facing system.

  • SystemVerilog
  • Intel Quartus Prime
  • Static timing analysis
Read more →
Four tracked cognitive signals plotted over time beside a 30-second check-in ringFull-Stack
2025U03

AntarLens

AI Cognitive Health Platform

A deployed full-stack AI platform that tracks focus, mood, energy and sleep, then predicts a user's cognitive patterns from their own data via a 30-second daily check-in.

  • Next.js
  • React
  • Supabase (Postgres, RLS)
  • OpenAI API
  • Vercel
Read more →
J1 · Contact

Contact Sudip Paudel — hire me for a Summer 2026 engineering internship

Looking for a Summer 2026 engineering internship — embedded, hardware, full-stack, or anywhere the three meet. Send a message and I'll reply.